发明名称 |
Method and apparatus for switching ATM, TDM and packet data through a single communication switch |
摘要 |
<p>A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12x12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13.89 microseconds. Each slot includes a 4-bit tag plus a 4-bnyte payload. The slot bandwidth is 2.592 Mbps which is large enough to carry an E-1 signal with overhead. The 4-bit tag is a cross connect pointer which is set up when a TDM connection is provisioned. The last twenty slots of the frame are reserved for link overhead. Thus, the frame is capable of carrying the equivalent of 1,680 E-1 TDM signals. For ATM and packet data, a PDU (protocol data unit) of 16 slots is defined for a 64-byte payload. The PDUs are self-routed through the switch with a 28-bit routing tag which allows routing through seven switch stages using 4-bits per stage. Bandwidth is arbitrated among ATM and Packet connections while maintaining TDM timing.
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申请公布号 |
EP2045983(A3) |
申请公布日期 |
2009.06.24 |
申请号 |
EP20090000222 |
申请日期 |
2001.11.20 |
申请人 |
TR TECHNOLOGIES FOUNDATION LLC |
发明人 |
ROY, SUBHASH C.;RENAULT, MICHAEL M.;CARTER, FREDERICK R.;TOEBES, DAVID K.;RAMCHANDANI, RAJEN S. |
分类号 |
H04J3/00;H04J3/16;H04L;H04L12/54;H04L12/64;H04L12/70;H04L12/931;H04L29/06;H04Q3/52;H04Q11/04 |
主分类号 |
H04J3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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