发明名称 Method and apparatus for synchronous unbuffered flow control of packets on a ring interconnect
摘要 Embodiments of the present invention are related in general to data flow control in a network and in particular to synchronous packet flow control in a ring interconnect. An embodiment of a method may include rejecting an arriving packet at a destination node on a semiconductor chip's ring interconnect, e.g., an unbuffered, synchronous ring interconnect, if all of the destination node's buffers are not available, leaving the rejected packet on the ring interconnect to continue traversing the ring, and accepting the rejected packet upon arrival at the destination node, if a buffer is available. In an alternate embodiment, a method may include tracking the rejected packet as the rejected packet traverses the ring interconnect. An embodiment of an apparatus may include a semiconductor chip having a bidirectional ring interconnect and multiple nodes coupled to the bidirectional ring interconnect. Each node may have a buffer to store packets that arrive on the ring interconnect, if the buffer is available, and to reject packets that arrive, if the buffer is not available. These embodiments provide efficient flow control of packets on unbuffered, synchronous ring interconnects. Exemplary applications include chip multiprocessing.
申请公布号 US7539141(B2) 申请公布日期 2009.05.26
申请号 US20040855483 申请日期 2004.05.28
申请人 INTEL CORPORATION 发明人 MATTINA MATTHEW;CHRYSOS GEORGE Z.;FELIX STEPHEN
分类号 H04L12/26;H04L12/28;H04L12/427;H04L12/43;H04L12/56 主分类号 H04L12/26
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