METHOD TO REDUCE TRENCH CAPACITOR LEAKAGE FOR RANDOM ACCESS MEMORY DEVICE

摘要

The invention, in one aspect, provides a method of manufacturing a semiconductor device. This method includes forming a trench isolation structure (118) in a dynamic random memory region (DRAM) (110) of a semiconductor substrate (109) and patterning an etch mask over the trench isolation structure (118) to expose a portion of the trench isolation structure (118). A portion of the exposed trench isolation structure (118) is removed to form a gate trench (116) therein, wherein the gate trench (116) includes a first corner formed by the semiconductor substrate and a second corner formed by the trench isolation structure. The etch mask is removed from the DRAM region (110) and the at least the first corner of the gate trench is rounded to form a rounded corner (120). This is followed by the formation of an oxide layer (124) over a sidewall of the gate trench (116), the first rounded corner (120), and the semiconductor substrate (109) adjacent the gate trench (116). The trench (116) is filled with a gate material.