发明名称 |
DUAL MODE AES IMPLEMENTATION TO SUPPORT SINGLE AND MULTIPLE AES OPERATIONS |
摘要 |
An apparatus comprising a mode circuit and an encryption circuit. The mode circuit may be configured to selectively provide register input data on an output signal when in a first mode and memory data on the output signal when in a second mode. The encryption circuit may be configured to interchangeably encrypt/decrypt between the register input data and the memory data. |
申请公布号 |
KR20090043592(A) |
申请公布日期 |
2009.05.06 |
申请号 |
KR20097005935 |
申请日期 |
2007.08.16 |
申请人 |
LSI CORPORATION |
发明人 |
PARVEEN NASIMA;BALASUBRAMANIAN VENKATESH |
分类号 |
G09C1/00;H03K19/00;H04L25/38 |
主分类号 |
G09C1/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|