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发明名称
嵌埋电容元件之封装基板结构及其制法
摘要
本发明提供一种嵌埋电容元件之封装基板结构,包括:二电容设置层,该二电容设置层系分别由一高介电材料层及配置于其两相对表面之第一线路层所组成,且第一线路层分别具有复数电极板及线路;一黏着层,系配置于该二电容设置层之间,以黏合该二电容设置层,俾成为一核心板结构,且该黏着层系填满第一线路层中之空隙;以及复数导电通孔,系贯穿该二电容设置层及该黏着层,且各别电性连接该些电容设置层之该些线路;其中,每一电容设置层两侧之该些电极板系平行对应,以形成电容元件。
申请公布号
TW200919676
申请公布日期
2009.05.01
申请号
TW096138831
申请日期
2007.10.17
申请人
全懋精密科技股份有限公司
发明人
许诗滨;张文松;杨智贵
分类号
H01L23/492(2006.01);H01L23/64(2006.01);H01L21/60(2006.01)
主分类号
H01L23/492(2006.01)
代理机构
代理人
吴冠赐;杨庆隆;林志鸿
主权项
地址
新竹市东区新竹科学工业园区力行路6号
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