发明名称 Memory output circuit and method thereof
摘要 An output circuit of a memory is provided. The output circuit includes a first pre-charge circuit, a multiplexer, and a sense amplifier. The first pre-charge circuit pre-charges the voltage of a target readout bit line to the logic high level according to a pre-charge signal. The multiplexer selects the target readout bit line from multiple readout bit lines according to a selecting signal. The sense amplifier detects the voltage of the target readout bit line after the target memory cell is selected to be readout.
申请公布号 US7525854(B2) 申请公布日期 2009.04.28
申请号 US20060563244 申请日期 2006.11.27
申请人 VIA TECHNOLOGIES, INC. 发明人 HUANG CHAO-SHENG
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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