On chip system for Interconnecting external functional blocks comprising a single parametrizable communication protocol,申请号EP20070300863-传众专利搜索

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发明名称	On chip system for Interconnecting external functional blocks comprising a single parametrizable communication protocol
摘要
申请公布号	EP1845456(B1)	申请公布日期	2009.04.08
申请号	EP20070300863	申请日期	2007.03.14
申请人	ARTERIS	发明人	DOUADY, CESAR;BOUCARD, PHILIPPE
分类号	G06F13/00	主分类号	G06F13/00
代理机构		代理人
主权项
地址

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