MEMORY COMPRISING NON-VOLATILE PORTION

摘要

The invention concerns a memory having an array of memory cells (1002) arranged in rows and columns, each being capable of storing at least one first bit of data and comprising an output arranged to output said at least one first bit of data; a plurality of groups of bit lines (1004), each group of bit lines being associated with one of said rows or columns of memory cells, the output of each memory cell being connected to at least one bit line of a group of bit lines, said connection indicating at least one second bit of data, said second bit of data being non-volatile; and output circuitry (1006) coupled to said groups of bit lines and comprising detection circuitry arranged to determine said first and second bits, and logic circuitry arranged to perform a logic function on said first and second bits.