| 摘要 |
A semiconductor memory device and a test method thereof are provided to read data signals at real speed by adding a data address signal generation circuit part, a WEB(Write Enable Bar) generation circuit part, and a test signal control circuit part. A WEB generation circuit part(3) controls a WEB signal of a RAM(1), and receives signals from a UDL(User Defined Logic) part(14), a CLK terminal, and a test signal control circuit part(4). An output terminal of the WEB generation circuit part is connected to a WEB terminal of the RAM. A data address signal generation circuit part(5) generates data of the RAM and an address signal using a scan flip flop of a BIST(Built In Self Test) circuit(2). The test signal control circuit part controls the WEB generation circuit part and the data address signal generation circuit part, and controls a route of a data value and an address value inputted in the RAM.
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