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发明名称
半导体记忆元件内形成隔离膜之方法
摘要
本发明系有关于一种形成半导体记忆体装置之隔离膜的方法。依据本发明,在形成一通道氧化膜前所实施之一预处理清洗制程中,在60℃-70℃温度范围内实施一SC-1清洗制程。因此,即使在该SC-1清洗制程及一DHF清洗制程中,亦可使在一胞元区域及一周边区域中之氧化膜凹陷。因而可减少DHF清洗时间。因此,本发明具有下列优点:本发明可藉由DHF最小化一矽基板之损失,以及因而可控制一凹坑之深度。
申请公布号
TW200903716
申请公布日期
2009.01.16
申请号
TW097134378
申请日期
2004.12.15
申请人
海力士半导体股份有限公司
发明人
李承撤;朴相昱;宋弼根
分类号
H01L21/76(2006.01)
主分类号
H01L21/76(2006.01)
代理机构
代理人
何金涂
主权项
地址
南韩
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