| 摘要 |
PURPOSE:To avoid an increment of the number of ROMs, by distributing load processing programs to a common memory for plural processors and replacing a program which is under execution with an indicated program by processor received a load indication. CONSTITUTION:A CPU2, (n) units of input/output devices IOP3-1-3-n and a common memory CM5 are connected to a common bus 1, and the memory 5 receives an access from each IOP3. The CPU2 contains a processor 6 and a main memory MM7; while the IOP3 contains processors 8 and 10 and local memories LM9 and 11. A load processing program 12 and IOP programs 15-1- 15-n are loaded to the CM5. A processor received a load indication from the CPU2 replaces the program address which is under execution with the head address of the program 12 distributed on the CM5 and loads the programs 15-1- 15-n to the memories LM9 and 11 from the CM5. Thus a load processing program is shared to reduce the number of ROMs. |
