| 摘要 |
PURPOSE:To prevent the latch-up phenomenon of a complementary type MOS integrated circuit by implanting impurity ions to the inward section of a P-well from the direction along the direction of a crystal lattice of the P-well and forming a high concentration layer to a deep layer section. CONSTITUTION:A photo-resist 60 is applied onto a P-well 45, and impurity ions such as boron ions are implanted to an N-type substrate 41 to simultaneously shape a source region 62 and a drain region 63 in a P-MOS transistor Tr. The resist 60 is removed, a photo-resist 65 is applied onto a region 62, a gate electrode 57 and a region 63, and phosphorus is implanted to the P-well 45 to form a source region 66 and a drain region 67 in an N-MOSTr at the same time. Boron is implanted into the P-well 45 from the direction along the direction of a crystal lattice of the substrate 41 while penetrating the region 66 and the region 67, thus shaping high concentration layers 47 in predetermined thickness to inward sections. Accordingly, a latch-up can be prevented. |
