发明名称 |
Semiconductor memory having a dynamic level detecting means for detecting a level of a word line |
摘要 |
A semiconductor memory includes a word line driving circuit whose output terminal is coupled to one end of each word line of a memory array, and also an auxiliary driving circuit which drives the other end of the word line upon receiving a selection signal transmitted to the other end of this word line. The auxiliary driving circuit comprises a level detector circuit which is dynamically driven by a timing signal, and a driving element which is driven by an output of the level detector circuit to drive the other end of the word line. When the word line is to be reset, the output of the level detector circuit is set at a level which brings the driving element into an "off" state. The auxiliary driving circuit of this arrangement permits the other end of the word line to change to a selection level quickly and to be reset quickly.
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申请公布号 |
US4719603(A) |
申请公布日期 |
1988.01.12 |
申请号 |
US19860852316 |
申请日期 |
1986.04.15 |
申请人 |
HITACHI LTD;HITACHI MICROCUMPUTER ENG |
发明人 |
SHINAGAWA, YUTAKA;SHIMADA, SHIGERU |
分类号 |
G11C17/12;G11C8/08;G11C11/407;G11C17/18;(IPC1-7):G11C7/00;G11C11/24 |
主分类号 |
G11C17/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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