INTER THREAD TRACE ALIGNMENT METHOD AND SYSTEM FOR A MULTI-THREADED PROCESSOR
摘要
Techniques for the design and use of a digital signal processor, including (but not limited to) for processing transmissions in a communications (e.g., CDMA) system. Inter-thread trace alignment with execution trace processing includes recording timing data relating to a common predetermined event. Such an event may be the number of cycles since a last thread initiated execution tracing or the number of cycles since all threads terminated execution tracing. The number of cycles at which a thread initiates execution tracing is referenced to the common predetermined event for maintaining the timing of execution tracing. The data relating to the common predetermined event is then updated to associate with the time at which the thread initiated execution tracing. The result is to permit aligning the timing data associated with all threads. Interrelated records permit reconstructing interdependent execution tracing information for threads operating in the multi-threaded processor, as well as synchronizing timing data for all operating threads.
申请公布号
WO2008128107(A2)
申请公布日期
2008.10.23
申请号
WO2008US60117
申请日期
2008.04.11
申请人
QUALCOMM INCORPORATED;GIANNANI, LOUIS ACHILLE;ANDERSON, WILLIAM C.;CHEN, XUFENG
发明人
GIANNANI, LOUIS ACHILLE;ANDERSON, WILLIAM C.;CHEN, XUFENG