发明名称 Parallel circuit simulation techniques
摘要 Methods for improving the accuracy and performance of large complex circuit simulations including; special processing of clock structures, minimizing repetitive simulation of identical structures, partitioning designs into sub-systems for use by one of a variety of matrix inversion techniques, row partitioning matrices for parallel solving, applying two stage Newton-Ralphon's method and iteratively selecting one of a number of serial and parallel matrix solvers to perform circuit simulation.
申请公布号 US2008208553(A1) 申请公布日期 2008.08.28
申请号 US20070712313 申请日期 2007.02.27
申请人 FASTRACK DESIGN, INC. 发明人 BORAH MANJIT;ROUZ KHOSRO
分类号 G06F17/50 主分类号 G06F17/50
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