| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To enable real time display by a high speed arithmetic circuit for interpolation calculation accompanying expansion or reduction of a texture pattern by a bicubic correlation function, etc. to a mapping surface in texture mapping. <P>SOLUTION: High speed expansion and reduction conversion arithmetic circuits of a primitive pattern is constituted by using circuit structure for reading the texture pattern from a cache memory 2 by a texture address generation circuit 1 and loading applicable data from an external memory 3 when a cache mistake detection circuit 4 detects cache mistakes, and an interpolation circuit 4 by the bicubic function. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
