发明名称 |
Systems and Methods for Implementing Logic in a Processor |
摘要 |
Systems, methods and media for implementing logic in the arithmetic/logic unit of a processor are disclosed. More particularly, hardware is disclosed for computing logical operations with minimal hardware by organizing the execution unit such that the propagate and generate functions required for the adder can be used as a basis to implement the bitwise logical instructions. The result of these functions is computed before execution of the instruction by an execution macro in the arithmetic/logic unit.
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申请公布号 |
US2008168115(A1) |
申请公布日期 |
2008.07.10 |
申请号 |
US20080053038 |
申请日期 |
2008.03.21 |
申请人 |
BUSABA FADI YUSUF;LLOYD BRYAN;VADEN MICHAEL THOMAS |
发明人 |
BUSABA FADI YUSUF;LLOYD BRYAN;VADEN MICHAEL THOMAS |
分类号 |
G06F17/00 |
主分类号 |
G06F17/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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