发明名称 |
POWER FAILURE DETECTION CIRCUIT, POWER FAILURE DETECTION METHOD, AND POWER SUPPLY SYSTEM |
摘要 |
<p>A power failure detection circuit includes: a zero cross timing detection unit (61) which generates a zero cross signal ACp of the plus side and a zero cross signal ACm of the minus side; a minus side zero cross interval acquisition unit (621) and a plus side zero cross interval acquisition unit (622) which cause a timer (64) to measure a phase judgment time T2 as information on the time from the fall of ACp to the fall of ACm and the time from the fall of ACm to the fall of ACp; and a first and a second power failure detection unit (623, 624) which detect power failure when ACp and ACm are at a lower level after the power failure judgment time t1 from the fall of the ACp and ACm, respectively and acquire the phase judgment time T2 as information indicating the phase when power failure has occurred.</p> |
申请公布号 |
WO2008146445(A1) |
申请公布日期 |
2008.12.04 |
申请号 |
WO2008JP01075 |
申请日期 |
2008.04.24 |
申请人 |
TAKEDA, MUTSUHIKO;PANASONIC CORPORATION |
发明人 |
TAKEDA, MUTSUHIKO |
分类号 |
G01R19/165;G01R19/175 |
主分类号 |
G01R19/165 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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