发明名称 Parallel computer architecture of a cellular type, modifiable and expandable
摘要 This processing is distributed among number of simple hexagonal units distributed in a honeycomb layer, consisting of a central hexagram surrounded by six receiving cells, each representing an invariable binary place fed into central hexagram's CPU controlled by a simple program. The activated receiving cells indicate the presence of a stimulus. The interconnected layers overlap so that the higher-level receiving cells get input from the lower-level central hexagrams and higher-level output modifies lower-level programs as well as sends input to other levels or Memory Units. Integration of layer output is achieved in 3D Memory Unit Complex consisting of truncated octagons, where each hexagonal side represents a binary number linked to 6 others through one binary place that makes adjacent numbers different. The input into each Memory Unit comes from the output of a Patch of central hexagrams a clocked input, other-layer output or a Memory Unit feedback.
申请公布号 US7426500(B2) 申请公布日期 2008.09.16
申请号 US20030351484 申请日期 2003.01.27
申请人 DRAGOJLOVIC NEVEN 发明人 DRAGOJLOVIC NEVEN
分类号 G06E1/00;G06F15/16;G06F15/76;G06K9/00;H04N5/228 主分类号 G06E1/00
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