发明名称 ANORDNUNG UND VERFAHREN ZUM QUADRIEREN VON LANGEN GANZZAHLEN
摘要 A recursive VHDL compiler and a method of designing a logic circuit to be manufactured by means of a VHDL compiler. The method is adapted for designing hardware logic circuits that perform recursive computations. According to the design method, an indexing parameter is established. For values of the indexing parameter extending from a desired value to a minimum value, a recursive logic circuit is defined for a current value of the indexing parameter as interconnections between predefined logic circuits and one or more instances of the recursive logic circuit with the indexing parameter less than the current value. A base logic circuit is also defined for the minimum value of the indexing parameter. The definitions of the recursive logic circuits and base logic circuits are then processed for the desired value of the indexing parameter to produce a definition of the recursive logic circuit for the desired value of the indexing parameter in terms of predefined logic circuits.
申请公布号 AT404913(T) 申请公布日期 2008.08.15
申请号 AT20020719024T 申请日期 2002.02.20
申请人 ERICSSON INC. 发明人 DENT, PAUL W.;SMEETS, BEN;CROUGHWELL III, WILLIAM J.
分类号 G06F7/52;G06F7/552;G06F7/72 主分类号 G06F7/52
代理机构 代理人
主权项
地址