发明名称 STATISTICAL SIMULATION OF ON CHIP INTERCONNECTS
摘要 Systems and methods for statistical simulation of on chip interconnect models are provided. In on embodiment, the method comprises creating a non-linear on chip interconnect simulation model from parameters associated with the silicon chip process manufacturing; pre-calculating a linear function from the non-linear simulation model; replacing increments of variable parameters with statistical parameters; and performing, preferably, a Monte Carlo or corner simulation using the linear function.
申请公布号 US2008183443(A1) 申请公布日期 2008.07.31
申请号 US20070669173 申请日期 2007.01.31
申请人 GOREN DAVID;SHLAFMAN SHLOMO 发明人 GOREN DAVID;SHLAFMAN SHLOMO
分类号 G06F17/18;G06F17/50 主分类号 G06F17/18
代理机构 代理人
主权项
地址