发明名称 |
Semiconductor storage device |
摘要 |
A semiconductor storage device has a simple control circuit that is added to a general one-port RAM. Taking a port-A clock signal as the reference, the control circuit generates a select signal that selects a port A during the period from elapse of a first predetermined time from the reference timing until a second predetermined time has elapsed and selects a port B during other periods. The control circuit generates a port-A delayed clock signal in the period in which the port A is selected. The control circuit generates a port-B delayed clock signal during the period from elapse of the second predetermined time until a third predetermined time has elapsed. The control circuit generates a conflict monitoring signal during the period from the reference timing until the second predetermined time has elapsed. When a clock signal is supplied from the port B while the conflict monitoring signal is being generated, the port-B delayed clock signal is masked while the conflict monitoring signal is being generated. After the conflict monitoring signal is stopped, the B-port delayed clock signal is generated as a port-B clock signal.
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申请公布号 |
US7405995(B2) |
申请公布日期 |
2008.07.29 |
申请号 |
US20060580061 |
申请日期 |
2006.10.13 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
ISHIMOTO SEIICHIROU;TAKAMATSU KUNIO;KIMURA NAOYA |
分类号 |
G11C8/00;G11C7/00 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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