发明名称 Chip-level or symbol-level equalizer structure for multiple transmit and receiver antenna configurations
摘要 Disclosed is a chip-level or a symbol-level equalizer structure for a multiple transmit and receiver antenna architecture system that is suitable for use on the WCDMA downlink. The equalizer structure takes into account the difference in the natures of inter-antenna interference and multiple access interference and suppresses both inter-antenna interference and multiple access interference (MAI). Enhanced receiver performance is achieved with a reasonable implementation complexity. The use of the CDMA receiver architecture, in accordance with this invention, enables the realization of increased data rates for the end user. The CDMA receiver architecture can also be applied in conjunction with space-time transmit diversity (STTD) system architectures.
申请公布号 KR100848696(B1) 申请公布日期 2008.07.28
申请号 KR20067018587 申请日期 2006.09.11
申请人 发明人
分类号 H04B7/04;H04B1/707;H04B7/02;H04B7/06;H04B7/08;H04J99/00;H04L25/03;H04L27/00 主分类号 H04B7/04
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