发明名称
摘要 The present invention is directed toward a system on chip architecture having scalable, distributed processing and memory capabilities through a plurality of processing layers. One application of the present invention is in a novel media processing device, designed to enable the processing and communication of video and graphics using a single integrated processing chip for all visual media.
申请公布号 JP2008527545(A) 申请公布日期 2008.07.24
申请号 JP20070550531 申请日期 2006.01.09
申请人 发明人
分类号 G06F9/50;G06F9/38 主分类号 G06F9/50
代理机构 代理人
主权项
地址