发明名称 Synthesized assertions in a self-correcting processor and applications thereof
摘要 The present invention provides one or more synthesized assertions in a self-correcting processor, and applications thereof. In an embodiment, a synthesized assertion detects a mismatch between actual processor behavior and specified or expected processor behavior. When unexpected processor behavior is encountered, the synthesized assertion alters operation of the processor and causes the processor to behave in the specified or expected manner. Synthesized assertions in accordance with the present invention can detect and correct, for example, exception processing errors, instruction address errors, instruction opcode errors, and errors that can cause a processor to stall, as well as various other types of errors.
申请公布号 US2008177990(A1) 申请公布日期 2008.07.24
申请号 US20070655267 申请日期 2007.01.19
申请人 MIPS TECHNOLOGIES, INC. 发明人 BANERJEE SOUMYA;JENSEN MICHAEL GOTTLIEB
分类号 G06F9/445 主分类号 G06F9/445
代理机构 代理人
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