发明名称 N-BIT A/D CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide an N-bit A/D converter which can reduce deterioration in A/D conversion precision originating from a circuit element. SOLUTION: The N-bit A/D converter includes a digital circuit 12 which generates a digital value in non-redundant binary representation corresponding to an analog signal input to a cyclic A/D converting circuit 11. The digital circuit 12 includes a circuit 53 which corrects a mismatch error and a circuit 63 which corrects a finite gain error. The circuit 53 includes storage circuits 55a and 55b which store correction values X<SB>m1</SB>and X<SB>m2</SB>, an adder 57 which generates an addition value X<SB>m1</SB>+X<SB>m2</SB>, a storage circuit 59 which stores a coefficient E<SB>m</SB>for mismatch error correction, and a multiplier 61 which generates a multiplication value E<SB>m</SB>×(X<SB>m1</SB>+X<SB>m2</SB>). The circuit 63 includes storage circuits 65a and 65b which store correction values X<SB>g1</SB>and X<SB>g2</SB>, an adder 67 which generates an addition value X<SB>g1</SB>+X<SB>g2</SB>, a storage circuit 69 which stores a coefficient E<SB>fg</SB>for correcting the finite gain error, and a multiplier 71 which generates a multiplier value E<SB>fg</SB>×(X<SB>g1</SB>+X<SB>g2</SB>). COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008141399(A) 申请公布日期 2008.06.19
申请号 JP20060324549 申请日期 2006.11.30
申请人 NATIONAL UNIV CORP SHIZUOKA UNIV 发明人 KAWAHITO SHOJI
分类号 H03M1/10 主分类号 H03M1/10
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