发明名称 |
Method of chip manufacturing |
摘要 |
A method of chip manufacturing, comprises of a design stage; a simulation stage; a foundry stage; a testing/packaging stage; a cutting stage; and a final coating stage. The present invention provides a method of chip testing and comprises of disposing a substrate layer (302) on a wafer (301) having a plurality of chips; exposing a plurality of pads (303) on the chips of the wafer; forming bumps (304) on the pads of the chips of the wafer; performing tests from the bumps on the chips of the wafer. Alternatively, the present invention provides a method of chip testing which comprises of disposing a substrate layer on a wafer having a plurality of chips; connecting a plurality of pads on the chips of the wafer to a plurality of corresponding pads on the substrate layer; planting bumps on the pads on the opposite side of the substrate layer; performing tests from the bumps on the substrate layer. |
申请公布号 |
EP1930941(A2) |
申请公布日期 |
2008.06.11 |
申请号 |
EP20070021920 |
申请日期 |
2007.11.12 |
申请人 |
AIRDIO WIRELESS INC. |
发明人 |
TSAY, WEN-JIUNN;HWANG, BAO-TAI;CHANG, DAVID, HOW-CHERN;HUANG, LING-HAUR |
分类号 |
H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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