发明名称 WAVEFORM GENERATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To suppress a difference in waveform data generated by a waveform generating circuit. SOLUTION: The waveform generating circuit 100 comprises: a first delay circuit 20A for delaying input data by only an m (m is a natural number)-fold time of a sampling frequency and outputting it as first data Da; a second delay circuit 20B arranged at the post stage of the first delay circuit for delaying the first data Da by the m-fold time of the sampling frequency and outputting it as second data Db; an operational part (an arithmetic means) 30 having a multiplier 31 for multiplying the first data Da by a coefficient K and an adder/subtractor 32 for performing addition/subtraction between output data from the multiplier 31 and the second data Db; a memory M for previously storing the first to 2m-th waveform data d as initial values; and a selecting part 40. The selecting part 40 selectively outputs the waveform data d outputted from the memory M or the waveform data d outputted from the adder/subtractor 32. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008131280(A) 申请公布日期 2008.06.05
申请号 JP20060313256 申请日期 2006.11.20
申请人 YAMAHA CORP 发明人 TANIGUCHI JIYUNYA
分类号 H03B28/00 主分类号 H03B28/00
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