发明名称 Multi-layer bus system having a bus control circuit
摘要 A multi-layer bus system includes an interconnect matrix, bus slaves, bus masters and a bus control circuit. The interconnect matrix has master connection ports and slave connection ports, and connects one of the master connection ports to one of the slave connection ports in response a control signal. The slaves are connected to the slave connection ports, respectively. The bus masters includes a priority bus master connected to one of the master connection ports and a non-priority bus master. The priority bus master generates a bus demand signal when it needs a real-time operation. The bus control circuit is connected between the non-priority bus master and the other master connection ports. The bus control circuit disconnects the non-priority bus master to the other master connection ports in response to the bus demand signal.
申请公布号 US7373450(B2) 申请公布日期 2008.05.13
申请号 US20060331170 申请日期 2006.01.13
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 KAMEGAWA HIDEKI
分类号 G06F13/00 主分类号 G06F13/00
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