| 摘要 |
A semiconductor integrated circuit for reducing power consumption and simultaneous switching noise in an output circuit, which outputs plural pieces of output data including first and second output data, each including a plurality of bits. The first output data is generated from first original data. The second output data is generated from second original data. A comparison circuit generates a determination signal indicating whether the number of changed bits of the second original data from the first original data is greater than a predetermined number. In accordance with the determination signal, a selection circuit generates output data expressing the second original data and the data type in a first expression format or output data expressing the complement data of the second original data and the data type in a second expression format. This is output as the second output data.
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