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发明名称
GATE DIELECTRIC MATERIALS FOR GROUP III-V ENHANCEMENT MODE TRANSISTORS
摘要
A method for fabricating a transistor having a Group III-V semiconductor substrate with an oxygen-free dielectric disposed between the substrate and a gate is described.
申请公布号
WO2008005378(A8)
申请公布日期
2008.04.03
申请号
WO2007US15225
申请日期
2007.06.28
申请人
INTEL CORPORATION;METZ, MATTHEW, V.;DOCZY, MARK, L.;DATTA, SUMAN
发明人
METZ, MATTHEW, V.;DOCZY, MARK, L.;DATTA, SUMAN
分类号
H01L21/31
主分类号
H01L21/31
代理机构
代理人
主权项
地址
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