发明名称 HIGH PERFORMANCE CAPACITORS IN PLANAR BACK GATES CMOS
摘要 A method of manufacture and device for a dual-gate CMOS structure. The structure includes a first plate (106a-d) in an insulating layer (100) and a second plate (110a-d) above the insulating layer electrically corresponding to the first plate. An isolation structure (108a-d) is between the first plate and the second plate. ® KIPO & WIPO 2008
申请公布号 KR20080026182(A) 申请公布日期 2008.03.24
申请号 KR20087001233 申请日期 2006.06.26
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BRYANT ANDRES;NOWAK EDWARD J.;WILLIAMS RICHARD Q.
分类号 H01L21/8238 主分类号 H01L21/8238
代理机构 代理人
主权项
地址