CORRELATED DOUBLE SAMPLING AND ANALOGUE TO DIGITAL CONVERTING APPARATUS USING MULTIPLE SAMPLING IN CMOS IMAGE SENSOR

摘要

A CDS(Correlated Double Sampling) and ADC(Analogue-to-Digital Converting) apparatus using multiple sampling and a method thereof are provided to sample a reset signal and an image signal from the unit pixel of a pixel array in a CMOS(Complementary Metal-Oxide Semiconductor) image sensor one time during a cycle of horizontal scanning, sample respectively the reset signal and the image signal n times using a clock frequency for CDS and ADC, and perform ADC operation for the reset signal and the image signal n times, thereby reducing the random noise of the pixel, the random noise of ADC, and horizontal noise. A CDS and ADC block(410) samples a first signal n times during a first sampling time, samples a second signal the n times during a second sampling time, compares a sampled signal and a lamp signal in each sampling, and outputs a comparison signal corresponding to the compared result. A phase shifter(440) receives a reference clock signal and generates a clock signal having a phase difference as much as n times from a phase of the reference clock signal received in each sampling completion and an enable signal. A code generator(450) counts a first edge of the clock signal outputted from the phase shifter in response to the activated enable signal and outputs a digital code based on the counted result. A data bus(460) receives the comparison signal and the digital code and latches the digital code when the comparison signal is transferred.