发明名称 Augmenting semiconductor's devices quality and reliability
摘要 A method for augmenting quality or reliability of semiconductor units, including providing few populations of semiconductor units that are subject to quality or reliability testing. The populations include few quality or reliability fail candidate populations and other population(s). The method includes the step of associating test flows to the populations. Each test flow includes stress testing sequence. The stress testing sequence for the quality or reliability fail candidate population includes a stress test of increased duration compared to duration of a stress test in the test flow of the other population. The stress test sequence for the other population includes a stress test of increased voltage compared to corresponding operating voltage specification for a semiconductor unit. The method further includes the step of applying, within a sort testing stage, the corresponding test flow to the populations and identifying any unit which failed the stress sequence.
申请公布号 US7340359(B2) 申请公布日期 2008.03.04
申请号 US20060343209 申请日期 2006.01.31
申请人 OPTIMALTEST LTD 发明人 EREZ NIR;BALOG GIL
分类号 G06F19/00 主分类号 G06F19/00
代理机构 代理人
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