发明名称 Electrostatic discharge protection circuit and semiconductor device
摘要 An electrostatic discharge protection circuit and a semiconductor device that prevent the breakdown of a semiconductor device caused by an electrostatic discharge (ESD) which suddenly changes. When voltage which is far higher than VDD 1 is applied to a power supply line as a result of an ESD, a great electric potential difference is produced between VDD 1 and VSS. At this time an electric current path for making an electric charge generated by overvoltage flow to a grounding line is formed by a clamp circuit. As a result, an electric current flows into GND of a circuit block. This prevents the production of a great electric potential difference between VDD 1 and VSS. In addition, at this time a rapid change in the level of the overvoltage applied to a signal line is suppressed by a protection circuit. This prevents the dielectric breakdown of gate oxide films of transistors included in a circuit block which receives a control signal.
申请公布号 US2008043390(A1) 申请公布日期 2008.02.21
申请号 US20070882865 申请日期 2007.08.06
申请人 FUJITSU LIMITED 发明人 YOSHITANI MASANORI;HAYASHI TETSUYA;HIGUCHI TOMOKAZU
分类号 H02H9/00 主分类号 H02H9/00
代理机构 代理人
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