| 摘要 |
An interface module connected to a memory is provided to minimize delay time when multimedia data is processed, and diversify usage of the memory by enabling an additional processor to store data received from an image sensor irrespective of memory use of a main controller. A clock generator(825) generates a clock for operating the memory(230). A multiplexer(835) receives data for transceiving by synchronizing with a received selection signal or the data delayed for the predetermined time by synchronizing with the clock, and selects and outputs one data. Each flip-flop(840,845) latches the data received from the multiplexer and outputs the latched data by synchronizing with the clock. A first I/O(Input/Output) pad(810) outputs the clock to the memory. A second I/O pad(815) receives the data from the memory by synchronizing with the clock. A third I/O pad(820) receives the clock output through the first I/O pad as feedback and outputs the received clock to the flip-flop.
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