发明名称 TESTER, ADJUSTMENT METHOD, AND ADJUSTMENT PROGRAM
摘要 <p>Provided is a tester for testing a device to be tested, which has data terminals and a clock output terminal for outputting a clock signal indicating the timing to acquire data signals outputted from the data terminals. The tester comprises a reference clock source for generating the reference clock of the tester, timing comparators which are provided corresponding to the data terminals and which acquire the data signals outputted from the data terminals in accordance with a timing clock acquired by adjusting the phase of the reference clock, and an adjusting means for adjusting the phase of the timing clock according to the clock signal and the timing clock.</p>
申请公布号 WO2008007636(A1) 申请公布日期 2008.01.17
申请号 WO2007JP63654 申请日期 2007.07.09
申请人 SATO, NAOKI;ADVANTEST CORPORATION;CHIBA, NORIAKI;UEMATSU, TOMOHIRO 发明人 SATO, NAOKI;CHIBA, NORIAKI;UEMATSU, TOMOHIRO
分类号 G01R31/319;G01R31/3183 主分类号 G01R31/319
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