发明名称
摘要 PROBLEM TO BE SOLVED: To provide an SRAM in which a memory cell size can be miniaturized. SOLUTION: The memory cell of the SRAM has a structure, which comprises five conductive layers in the upper part of a field. Gate-to-gate electrode layers 111a, 111b, which comprise the gate electrode of a drive transistor and the gate electrode of a load transistor are situated in the first-layer conductive layer. Drain-to-drain connection layers 121a, 121b, which are used to connect the drain of the drive transistor and the drain of the load transistor and which contain tungsten are situated in the second-layer conductive layer. Drain-to-gate connection layers 131a, 131b used to connect the layers 121a, 121b to the layers 111a, 111b are situated in the third-layer conductive layer.
申请公布号 JP4032211(B2) 申请公布日期 2008.01.16
申请号 JP20010034204 申请日期 2001.02.09
申请人 发明人
分类号 H01L21/768;H01L21/8244;H01L27/11 主分类号 H01L21/768
代理机构 代理人
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