FLASH MEMORY DEVICE WITH DISTURB MONITORING SCHEME

摘要

A flash memory device with disturb monitoring scheme is provided to improve the reliability of the flash memory device by detecting program disturb and pass voltage disturb when program operation is performed. A memory cell array(100) includes a plurality of NAND strings(101,102,103) connected to bit lines and first and second disturb strings connected to first and second disturb bit lines respectively. A row selection circuit(400) drives word lines connected to memory cells of the NAND strings and the first disturb string. A page buffer circuit(300) is connected to the bit lines and the disturb bit lines electrically. A bias circuit(700) drives a common gate line connected to the memory cells of the second disturb string in common. A control circuit(500) controls the row selection circuit, the page buffer circuit and the bias circuit.