发明名称 Hochzuverlässige, kostengünstige und thermisch verbesserte Halbleiterchip-Befestigungstechnologie mit AuSn
摘要 The present invention relates to a circuit, an integrated circuit package and methods for attaching integrated circuit dies or discrete power components to flanges of integrated circuit packages, wherein each of said integrated circuit dies is sawed from a wafer. The invention comprises reducing the thickness of said wafer by mechanical grinding, applying an isotropic wet chemical etching to said wafer to eliminate crystal defects, evaporating adhesion and diffusion barrier metals on the backside of said wafer, evaporating Au and Sn on the backside of the wafer, wherein the weight proportion of Au is equal to or larger than 85%, sawing the wafer into said circuit dies, and soldering each of said circuit dies to a respective flange of an integrated circuit package. <IMAGE>
申请公布号 DE602004010061(D1) 申请公布日期 2007.12.27
申请号 DE20046010061T 申请日期 2004.03.09
申请人 INFINEON TECHNOLOGIES AG 发明人 HONG, SAM-HYO;HOYER, HENRIK IZARD;HUME, JEFFREY
分类号 H01L23/373;H01L21/304;H01L21/306;H01L21/58;H01L21/60;H01L21/78;H01L23/492;H01L29/45 主分类号 H01L23/373
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