| 摘要 |
Ferroelectric memory devices include a ferroelectric memory cell. The ferroelectric memory cell has at least one bit line and a plate line. A control circuit drives the at least one bit line with write data substantially concurrently with activation of the plate line during a write operation. The memory devices may also include a sense amplifier coupled to the ferroelectric memory cell and the control circuit may be further configured to deactivate the plate line substantially concurrently with activation of the sense amplifier during a read operation.
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