| 摘要 |
PROBLEM TO BE SOLVED: To provide a nonvolatile memory wherein the layout area of its memory array can be reduced. SOLUTION: In the nonvolatile memory, each bit line BL is coupled electrically to each tunnel magnetic resistance element TMR of each memory cell. Each tunnel magnetic resistance element TMR is coupled electrically to one electrode of the electrodes of each access transistor ATR formed in each active layer provided in a substrate of an underlay. Further, the other electrode (source) of the electrodes of each access transistor ATR is coupled electrically via a contact CT to each source line SL formed in a first metal wiring layer. Each active layer is so formed zigzag in the shape of a Z character as to form in itself inclusively each access transistor of each memory cell, and the access transistor of the memory cell belonging to the memory-cell row and memory-cell column adjacent to each memory cell. While forming the two access transistors in the one active layer, a pair of memory cells belonging to the memory-cell rows and memory-cell columns adjacent to each other are coupled electrically to each corresponding source line by using a common contact CT. COPYRIGHT: (C)2008,JPO&INPIT
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