发明名称 Integrated circuit having stress tuning layer and methods of manufacturing same
摘要 Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 mum, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.
申请公布号 US2007267724(A1) 申请公布日期 2007.11.22
申请号 US20060435436 申请日期 2006.05.16
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 JENG SHIN-PUU;CHAO CLINTON;LU SZU WEI
分类号 H01L23/58;H01L21/46 主分类号 H01L23/58
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