Mechanism to generate logically dedicated read and write channels in a memory controller,申请号GB20070018968-传众专利搜索

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发明名称	Mechanism to generate logically dedicated read and write channels in a memory controller
摘要
申请公布号	GB0718968(D0)	申请公布日期	2007.11.07
申请号	GB20070018968	申请日期	2007.09.27
申请人	INTEL CORPORATION	发明人
分类号		主分类号
代理机构		代理人
主权项
地址

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