发明名称 Sound Volume Control Circuit, Semiconductor Integrated Circuit And Sound Source Device
摘要 In a sound volume control circuit ( 100 ) shown in FIG. 2 , an attenuation coefficient setting register ( 28 ) holds an attenuation coefficient "b". When a stop instruction STOP becomes active, an output signal "a" from a first multiplexer ( 14 ), i.e., a processing object signal "in" is multiplied by the attenuation coefficient "b" by a multiplier ( 16 ), and the output signal "c" is outputted via a second multiplexer ( 18 ), a first flip-flop ( 20 ), and a third multiplexer ( 22 ). A multiplication master counter ( 38 ) holds the number of times the processing object signal "in" acquired by one sampling is multiplied by "b". The multiplication master counter ( 38 ) counts up by using a timer ( 36 ). A multiplication temporary counter ( 32 ) loads the output signal from the multiplication master counter ( 38 ) at the assert of an acquisition timing signal "L". The process from the first multiplexer ( 14 ) to the first flip-flop ( 20 ) is repeated by the number of times of the multiplication temporary counter ( 32 ).
申请公布号 US2007211910(A1) 申请公布日期 2007.09.13
申请号 US20050547601 申请日期 2005.04.04
申请人 KURIHARA NAOKI 发明人 KURIHARA NAOKI
分类号 H03G3/00;H03G3/02;H04R3/00;H04R29/00 主分类号 H03G3/00
代理机构 代理人
主权项
地址