| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a more reliable multichip package by ensuring matching of signal delay. <P>SOLUTION: The multichip package of this invention comprises: a first semiconductor memory which is controlled by a clock signal; and a second semiconductor memory which is controlled by a reverse clock signal. The first semiconductor memory and the second semiconductor memory of the multichip package have circuits to ensure matching of signal delay between a pad into which respective clock signals are inputted, a pad into which a reverse clock signal is inputted, a pad from which data enable signals are outputted, and a pad from which data signals are outputted, and their respective periphery circuits. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
