发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE
摘要 A method for forming an isolation layer in a semiconductor device is provided to improve a bottom-up phenomenon from the bottom of a trench and reduce an interval of deposition time of an insulation layer by changing the shape of the trench into a V-shape. A hard mask layer is formed on a semiconductor substrate(31) having an active region and an isolation region. By using the hard mask layer as an etch barrier, the substrate is etched to form a trench(34) of a V shape. A first insulation layer(37a) is deposited in the trench by increasing bias power in a condition of HF power of 500~5000 W. A second insulation layer(37b) is deposited on the first insulation layer by decreasing bias power in a condition of HF power of 100~4000 W to completely fill the trench. A CMP process is performed on the first and the second insulation layers to expose the hard mask layer. The hard mask layer is eliminated. The hard mask layer can be made of a stack structure of a pad oxide layer and a pad nitride layer.
申请公布号 KR20070090621(A) 申请公布日期 2007.09.06
申请号 KR20060020558 申请日期 2006.03.03
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, SUNG MIN
分类号 H01L21/76 主分类号 H01L21/76
代理机构 代理人
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