| 摘要 |
A method, system, and apparatus are disclosed that correct a differential clock signal. A clock correction circuit may determine a DC correction for a first clock signal of a differential clock signal and a DC correction for a second clock signal of a differential clock signal based upon a DC level of the differential clock signal. The clock correction circuit may adjust a DC level of the first clock signal based upon the DC correction for the first clock signal and a DC level of the second clock signal based upon the DC correction for the second clock signal to substantially maintain a duty cycle of the differential clock signal.
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