发明名称 DELAY-TYPE FLIP-FLOP CIRCUIT AND IMAGE DISPLAY DEVICE USING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a configuration for a source drive circuit for an image display device, wherein an input timing margin is large, an output delay time is small and the need for addition of a control signal from an external control circuit can be dispensed with. SOLUTION: The matrix image display device 100 includes a horizontal shift register 10 for generating a plurality of latch pulses NET, used to latch gradation data constituted of a plurality of bits in different timing respectively, and a latch pulse timing adjustment circuit 16; adopting a delay flip-flop 17, is connected after the output of the horizontal shift register 10. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007208401(A) 申请公布日期 2007.08.16
申请号 JP20060022231 申请日期 2006.01.31
申请人 MITSUBISHI ELECTRIC CORP 发明人 NOJIRI ISAO
分类号 H03K3/037;G02F1/133;G09G3/20;G09G3/36 主分类号 H03K3/037
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