| 摘要 |
PROBLEM TO BE SOLVED: To grasp the process timing of each signal processing circuit to make a signal processing time of an entire device shorten in a signal processor where a plurality of signal processing circuits are series-connected. SOLUTION: A first signal processing circuit receives a readout end signal from a second signal processing circuit to transmit a writing ready signal to the previous-stage circuit and to input the data signal from the previous-stage circuit. Then, the first signal processing circuit outputs a data signal subjected to an arithmetic process to a memory corresponding to the readout end signal to write the data, and transmits to the second signal processing circuit a writing end signal corresponding to the memory where the data writing has completed. The second signal processing circuit receives the writing end signal and after having received the writing ready signal from the subsequent stage, reads out the data signal from the memory corresponding to the writing end signal to output the data signal subjected to the arithmetic process. The second signal processing circuit further transmits to the first signal processing circuit the readout end signal corresponding to the memory where the data readout has been performed. COPYRIGHT: (C)2007,JPO&INPIT
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